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sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 1 / 13 features and benefits 1. industry - leading noise performance with greatly improved bandwidth through proprietary amplifier and filter design techniques 2. small footprint package suitable for space - constrained applications 3. 1 m primary conductor resistance for low power loss 4. high isolation voltage, suitable for line - powered applications 5. user - adjustable overcurrent fault level 6. overcurrent fault signal typical ly responds to an overcurrent condition in < 2 s 7. integrated shield virtually eliminates capacitive coupling from current conductor to die due to high dv/dt voltage transients 8. filter pin capacitor improves resolution in low bandwidth applications 9. 3 to 5.5 v, single supply operation 10. factory trimmed sensitivity and quiescent output voltage 11. chopper stabilization results in extremely stable quiescent output voltage 12. ratiometric output from supply voltage package: 16 - pin soic hall effect ic package (suffix si ) typical application c ircuit
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 2 / 13 general descri ption the sec ? sc212 ksit current sensor provides economical and precise means for current sensing applications in industrial, commercial, and communications systems. the device is offered in a small footprint surface mount package that allows easy implementation in customer applications. the sc212 ksit consists of a precision linear hall sensor integrated circuit with a copper conduction path located near the surface of the silicon die. applied current flows through the copper conduction path, and the analog output voltage from the hall sensor linearly tracks the magnetic field generated by the applied current. the accuracy of the sc212 ksit is maximized with this patented packaging configuration because the hall element is situated in extremely close proximity to the current to be measured. high level immunity to current conductor dv/dt and stray electric fields, offered by sec proprietary integrated shield technology, results in low ripple on the output and low offset drift in high - side, high voltage applications. the voltage on the overcurrent input (v oc pin) allows customers to define an overcurrent fault threshold for the device. when the current flowing through the copper conduction path (between the i p + and i p ? pins) exceeds this threshold, the open drain overcurrent fault pin will transition to a logic low state. factory programming of the linear hall sensor inside of the sc212 ksit results in exceptional accuracy in both analog and digital output si gnals. the internal resistance of the copper path used for current sensing is typically 1 m, for low power loss. also, the current conduction path is electrically isolated from the low voltage sensor inputs and outputs. this allows the sc212 ksit family of sensors to be used in applications requiring electrical isolation, without the use of opto - isolators or other costly isolation techniques. the sc212 ksit is provided in a small, surface mount soic16 package. the lead frame is plated with 100% matte tin, which is compatible with standard lead (pb) free printed circuit board assembly processes. internally, the device is pb - free, except for flip - chip high - temperature pb - based solder balls, currently exempt from rohs. the device is fully calibrated prior to s hipment from the factory. applications 1. motor control and protection 2. load management and overcurrent detection 3. power conversion and battery monitoring / ups systems general package inform part number i p (a) sens (typ) at v = 5 v (mv/a) latched fault t a (c) packing sc212 ksit 25 56 y es ? 40 to 125 tape and reel, 1000 pieces per reel
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 3 / 13 absolute maximum ratings characteristic symbol notes rating unit supply voltage v cc 8 v filter pin v filter 8 v analog output pin v iout 32 v overcurrent input pin v oc 8 v overcurrent fault pin v fault 8 v fault enable (fault_en) pin v faulten 8 v voltage reference output pin v zcr 8 v dc reverse voltage: v cc, filter, v iout , v oc , faul , fault _en, and v zcr pins v rdcx ?0.5 v excess to supply voltage: filter, v iout , v oc , fault , fault_en, and v zcr pins v ex voltage by which pin voltage can exceed the v cc pin voltage 0.3 v output current source i iout(source) 3 ma output current sink i iout(sink) 1 ma operating ambient temperature t a range k ? 40 to 125 c junction temperature t j(max) 165 c storage temperature t stg ? 65 to 170 c isolation characteristics characteristic symbol notes rating unit dielectric strength test voltage* v iso agency type - tested for 60 seconds per ul standard 1577 3000 vac working voltage for basic isolation v wfsi for basic (single) isolation per ul standard 1577; for higher continuous voltage ratings, please contact sec 277 vac thermal characteristics characteristic symbol test conditions value unit package thermal resistance r ja when mounted on sec demo board with 1332 mm2 (654 mm2 on com ponent side and 678 mm2 on opposite side) of 2 oz. copper connected to the primary lead frame and 17 oc/w
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 4 / 13 functional block diagram t erminal list t able, latching v ersion number name description 1 through 4 i p + sensed current copper conduction path pins. terminals for current being sensed; fused internally, loop to i p ? pins; unidirectional or bidirectional current flow. 5 through 8 i p ? sensed current copper conduction path pins. terminals for current being sensed; fused internally, loop to i p + pins; unidirectional or bidirectional current flow. 9 gnd device ground connection. 10 v zcr voltage reference output pin. zero current (0 a) reference; output voltage on this pin scales with v cc . (not a highly accurate reference.) 11 filter filter pin. terminal for an external capacitor connected from this pin to gnd to set the device bandwidth. 12 v iout analog output pin. output voltage on this pin is proportional to current flowing through the loop between the i p + pins and i p ? pins. 13 fault overcurrent fault pin. when current flowing between ip+ pins and ip ? pins exceeds the overcurrent fault threshold, this pin transitions to a logic low state. 14 v cc supply voltage. 15 v oc overcurrent input pin. analog input voltage on this pin sets the overcurrent fault threshold. 16 fault_en enables overcurrent faulting when high. resets fault when low.
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 5 / 13 common operating characteristics valid at t a = ? 40c to 125c, v cc = 5 v, unless otherwise specified characteristic symbol t est conditions min. t yp. max. units electrical characteristics supply v oltage 1 v cc 3 ? 5.5 v nominal supply v oltage v ccn ? 5 ? v supply current i cc v iout open, fault pin high ? 1 1 14.5 ma output capacitance load c load v iout pin to gnd ? ? 10 nf output resistive load r load v iout pin to gnd 10 ? ? k magnetic coupling from device conductor to hall element mc hall current flowing from i p + to i p ? pins ? 9.5 ? g/a internal filter resistance 2 r f(int) ? 1.7 ? k primary conductor resistance r prima r y t a = 25c ? 1 ? m analog output signal characteristics full range linearity 3 e lin i p = i p0a ?0.75 0.25 0.75 % symmetry 4 e sym i p = i p0a 99.1 100 100.9 % bidirectional quiescent output v out(qbi) i p = 0 a, t a = 25c ? v cc /2 ? v timing performance characteristics v iout signal rise t ime t r t a = 25c, swing i p from 0 a to i p0a , no capacitor on fi l ter pin, 100 pf fromv iout to gnd ? 3 ? s v iout signal propagation t ime t prop t a = 25c, no capacitor on fi l ter pin, 100 pf from v iout to gnd ? 1 ? s v iout signal response t ime t response t a = 25c, swing i p from 0 a to i p0a , no capacitor on fi l ter pin, 100 pf fromv iout to gnd ? 4 ? s v iout large signal bandwidth f 3db ? 3 db, apply i p such that v iout = 1 v pk - pk , no capacitor on fi l ter pin, 100 pf from v iout to gnd ? 120 ? khz power - on t ime t po output reaches 90% of steady- state level, no capacitor on fi l ter pin, t a = 25c ? 35 ? s overcurrent characteristics setting v oltage for overcurrent switchpoint 5 v oc v cc 0.25 ? v cc 0.4 v signal noise at overcurrent comparator input i ncomp ? 1 ? a overcurrent fault switchpoint error 6,7 e oc switchpoint in v oc safe operating area; assumes i ncomp = 0 a ? 5 ? % overcurrent fault pin output v oltage v fault 1 ma sink current at fault pin ? ? 0.4 v
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 6 / 13 fault enable ( f au l t_en pin) input low v oltage threshold v il ? ? 0.1 v cc v fault enable ( f au l t_en pin) input high v oltage threshold v ih 0.8 v cc ? ? v fault enable ( f aul t_en pin) input resistance r fei ? 1 ? m overcurrent characteristics fault enable ( f aul t_en pin) delay 8 t fed set f aul t_en to lo w , v oc = 0.25 v cc , c oc = 0 f; then run a dc i p exceeding the corresponding overcurrent threshold; then reset f aul t_en from low to high and measure the delay from the rising edge of f aul t_en to the falling edge of fault ? 15 ? s fault enable ( f au l t_en pin) delay(non - latching versions) 9 t fed(nl ) set f aul t_en to lo w , v oc = 0.25 v cc , c oc = 0 f; then run a dc i p exceeding the corresponding overcurrent threshold; then reset f aul t_en from low to high and measure the delay from the rising edge of f aul t_en to the falling edge of fault ? 150 ? ns overcurrent fault response t ime t oc f au l t_en set to high for a minimum of 20 s before the overcurrent event; switchpoint set at v oc = 0.25 v cc ; delay from i p exceeding overcurrent fault threshold to v fault < 0.4 v , ? 1.9 ? s undercurrent fault response t ime(non - latching versions) t uc f aul t_en set to high for a minimum of 20 s before the undercurrent event; switchpoint set at v oc = 0.25 v cc ; delay from i p falling below the overcurrent fault threshold to v fault > 0.8 v cc , without external c oc capacito r , r pu = 330 k ? 3 ? s overcurrent fault reset delay t ocr t ime from v f au l ten < v il to v fault > 0.8 v cc , r pu = 330 k ? 500 ? ns overcurrent fault reset hold t ime t och t ime from v f au l ten < v il to rising edge of v fault ? 250 ? ns overcurrent input pin resistance r oc t a = 25c, v oc pin to gnd 2 ? ? m vo lt age reference characteristics v oltage reference output v zcr t a = 25 c (not a highly accurate reference) 0.48 v cc 0.5v cc 0.51 v cc v v oltage reference output load current i zcr source current 3 ? ? ma sink current 50 ? ? a v oltage reference output drift ? v zcr ? 10 ? mv
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 7 / 13 1. devices are programmed for maximum accuracy at v cc = 5 v. the device contains ratiometry circuits that accurately alter the 0 a output voltage and sensitivity level of the device in proportion to the applied v cc level. however, as a result of minor nonlinearities in the ratiometry circuit, additional output error will result when v cc varies from the v cc level at which the device was programmed. customers that plan to operate the device at a v cc lev el other than the v cc level at which the device was programmed should contact their local sec sales representative regarding expected device accuracy levels 2. under these bias conditions. 3. rf(int) forms an rc circuit via the filter pin. 4. this parameter can drift by as much as 0.8% over the lifetime of this product. 5. this parameter can drift by as much as 1% over the lifetime of this product. 6. see page 8 on how to set overcurrent fault switch point. 7. switchpoint can be lower at the expense of switch point accura cy. 8. this error specification does not include the effect of noise. see the incomp specification in order to factor in the additio nal influence of noise on the fault switch point. 9. fault enable delay is designed to avoid false tripping of an overcurrent (oc) fault at power - up. a 15 s (typical) delay will always be needed, every time fault_en is raised from low to high, before the device is ready for responding to any overcurrent event. 10. during power - up, this delay is 15 s in order to avoid false trippin g of an overcurrent (oc) fault.
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 8 / 13 performance characteristics ta range k, valid at t a = ? 40c to 125c, v cc = 5 v, unless otherwise specified characteristic symbol t est conditions min. t yp. max. units optimized accuracy range 1 i poa ?12.5 ? 12.5 a linear sensing range i r ?37.5 ? 37.5 a noise 2 v nois e(rm s) t a = 25c, sens = 56 mv/a, c f = 0, c load = 4.7 nf , r load open ? 1.50 ? mv sensitivity 3 sens i p = 12.5 a, t a = 25c ? 56 ? mv/a i p = 12.5 a, t a = 25c to 125c ? 56 ? mv/a i p = 12.5 a, t a = ? 40c to 25c ? 57 ? mv/a electrical o f fset v oltage v ariation relative to v out 4 v oe i p = 0 a, t a = 25c ? 4 ? mv i p = 0 a, t a = 25c to 125c ? 14 ? mv i p = 0 a, t a = ? 40c to 25c ? 23 ? mv t otal output error 5 e t ot over full scale of i poa , i p applied for 5 ms, t a = 25c to 125c ? 2.2 ? % over full scale of i poa , i p applied for 5 ms, t a = ? 40c to 25c ? 3.9 ? % 1. although the device is accurate over the entire linear range, the device is programmed for maximum accuracy over the range defined by i poa .the reason for this is that in many applications, such as motor control, the start - up current of the motor is approximately three times higher than the running current. 2. v pk- pk noise (6 sigma noise) is equal to 6 v noise (rms). lower noise levels than this can be achieved by using c f for applications requiring narrower bandwidth. see characteristic performance page for graphs of noise versus c f and bandwidth versus c f . 3. this parameter can drift by as much as 2.4% over the lifetime of this product. 4. this parameter can drift by as much as 13 mv over the lifetime of this product. 5. this parameter can drift by as much as 2.5% over the lifetime of this product.
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 9 / 13 characteristic performance bandwidth value c f capacitor connected between filter pin and gnd noise versus external capacitor value c f capacitor connected between filter pin and gnd
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 10/ 13 characteristic performance data accuracy data electrical offset voltage versus ambient temperature sensitivity versus ambient temperature nonlinearity versus ambient temperature symmetry versus ambient temperature total output error versus ambient temperature
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 11/ 13 setting overcurrent fault switchpoint the v oc needed for setting the overcurrent fault switchpoint can be calculated as follows: v oc = sens | i oc | , where v oc is in mv, sens in mv/a, and i oc (overcurrent fault switchpoint) in a. | ioc | is the overcurrent fault switchpoint for a bidirectional (ac) current, which means a bi - directional sensor will have two symmetrical overcurrent fault switchpoints, +i oc and ?i oc . see the following graph for i oc and v oc ranges : example: for sc212 ksit , if required overcurrent fault switchpoint is 25 a, and v cc = 5 v, then the required v oc can be calculated as follows: v oc = sens i oc = 56 25 = 1400 (mv) overcurrent fault operation the primary concern with high - speed fault detection is that noise may cause false tripping. various applications have or need to be able to ignore certain faults that are due to switching noise or other parasitic phenomena, which are application dependant. the problem with simply trying to filter out this noise in the main signal path is that in high - speed applications, with asymmetric noise, the act of filt ering introduces an error into the measurement. to get around this issue, and allow the user to prevent the fault signal from being latched by noise, a circuit was designed to slew the fault pin voltage based on the value of the capacitor from that pin to ground. once the voltage on the pin falls below 2 v, as established by an internal reference, the fault output is latched and pulled to ground quickly with an internal n - channel mosfet. fault walk - through the following walk - through refere nces various sections and attributes in the figure below. this figure shows different fault set/reset scenarios and how they relate to the voltages on the fault pin, fault_en pin, and the internal overcurrent (oc) fault node, which is invisible to the customer. 1. because the device is enabled (fault_en is high for a minimum period of time, the fault enable delay, tfed , 15 s typical) and there is an oc fault condition, the device fault pin
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 12/ 13 starts discharging. 2. when the fault pin voltage reaches approximately 2 v, the fault is latched, and an internal nmos device pulls the fault pin voltage to approximately 0 v. the rate at which the fault pin slews downward (see [4] in the figure) is dependent on the external capacitor, c oc , on the fault pin. 3. when the fault_en pin is brought low, the fault pin starts resetting if no oc fault condition exists, and if fault_en is low for a time period greater th an t och . the internal nmos pull - down turns off and an internal pmos pullup turns on (see [7] if the oc fault condition still exists). 4. the slope, and thus the delay to latch the fault is controlled by the capacitor, c oc , placed on the fault pin to ground. during this portion of the fault (when the fault pin is between v cc and 2 v), there is a 3 ma constant current sink, which discharges c oc . t he length of the fault delay, t is equal to: ma v v c t cc oc 3 ) 2 ( ? = where v cc is the device power supply voltage in volts, t is in seconds and c oc is in farads. this formula is valid for r pu htxdowrrujuhdwhuwkdqn )ruorzhu - value resistors, the current flowing through the r pu resistor during a fault event, ipu , will be l arger. therefore, the current discharging the capacitor would be 3 ma ? ipu and equation 1 may not be valid. 5. the fault pin did not reach the 2 v latch point before the oc fault condition cleared. because of this, the fixed 3 ma current sink turns off, and the internal pmos pull - up turns on to recharge c oc through the fault pin. 6. this curve shows v cc charging external capacitor c oc through the internal pmos pull - up. the slope is determined by c oc . 7. when the fault_en pin is brought low, if the fault condition still exists, the latched fault pin will be pulled low by the internal 3ma current source. when fault condition is removed then the fault pin charges as shown in step 6. 8. at this point there is a fault con dition, and the part is enabled before the fault pin can charge to v cc . this shortens the user - set delay, so the fault is latched earlier. the new delay time can be calculated by equation 1, after substituting the voltage seen on the fault pin for v cc . 2 2 2 vcc 2v 0v fault_en input oc fault condition (active high) 1 4 8 6 1 4 5 6 1 4 7 6 4 3
sc212 ksit 120 khz bandwidth, high voltage isolation current sensor with integrated overcurrent detection 13/ 13 package 16- pin soicw for reference only; not for tooling use (reference ms - 013aa) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown

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